Using an external PD team has become a valid option for small and medium fabless semiconductor companies. The complexity of modern devices and the depth of knowledge and experience required for successful chip physical design made this option very attractive for some companies despite the apparent drawbacks. The business justification is easy to understand and boils into a simple make-or-buy tradeoff but as in many other cases, the devil is in the details. The details in this case are extremely technical in nature and require deep understanding of the development process. The external ASIC vendor cannot accomplish his assigned task without clear guidance and close monitoring and someone needs to bridge the wide chasm between the logical side of the design and the physical implementation. The final responsibility always lies with the front-end team and management must be prepared with good answers when issues and tradeoff decisions start coming in.
Working with an ASIC vendor requires the design team to be very attentive to details. A deep understanding of the vendors PD flow is essential, enabling you to make sure the result meets your initial intent and expectations. The definitions of the design in the front-end must be in line with the PD team way of doing things. Issues like clock distribution, clock domain crossings, clock balancing, reset distribution, special blocks handling and I/O connectivity method must be in line with the PD methodology and tool flow in order to achieve good quality of results.
During the project, it is important to define a set of intermediate deliverables to be delivered by the vendor that will allow you to track the progress objectively. Different reports, drawings, results and proposals can be defined as milestones along the development process, giving you a clear picture of the quality of the results your vendor is capable of providing to you. If you do not find the quality or results satisfactory, you will still have sufficient time to demand better quality before the final reviews and re-align the requirements.
Continues tracking of issues and tasks between the design team and the implementation team enables you to assess the difficulty of the implementation and prepares you for delays and issues should they occur. The ability of the PD team to handle simple issues at early stages is a good indicator for later performance.
The importance of a face-to-face tape-out review is very high, giving you the option to get a firsthand impression of the professionalism of the engineers that implemented you design and ask for the details you would like to see and experience the fluency of the team in the matters at hand. A face-to-face review will give you the ability to see the device layout, ask the correct questions and get immediate answers. Trying to do the same over phone calls, video conferencing or emails is almost impossible.
In some cases more frequent face-to-face meetings in the vendor site should be planned, mainly at project kickoff and other important milestones. Experiencing the PD team first-hand would give you an understanding of the type of demands that can be placed and the expected response, preventing later misunderstandings and relational issues.
The preparation for physical design probably has the most drastic effect on the outcome of the joint development. Reducing the complexity that the PD team should face is best done at the very early stages of the design process where the cost of changes is lowest. The most obvious example of early planning that has high impact on the PD design is the issue of block partitioning. Using a physical design oriented block partitioning leads to a better floor-plan and enables early stage solutions for connectivity between physical blocks. Although at the early stages of design, the logical context seems to be most important in partitioning of the design, teams that will prefer the physical aspects and find logic solutions that support a robust floor-plan will benefit in the long run. See a detailed example of floor-plan and block partitioning impact of design closure under this article.
The most precious and illusive factor in chip design project planning is predictability and it is best achieved by detailed planning and genuine attempt to include essential information from later stages of the development in the decision making at the early stages. Preparing for PD design is one of the most painful aspects of this principle.