Memory if

  • DDRx DLL

    The DDR DLL core implements a master-slave structure where a master measures the cycle time and one or more slaves are used for delaying signals such as DDR DQS strobe.

  • PSRAM memory controller

    The PSRAM memory controller supports the main PSRAM standard for most memory access modes including configuration cycles, asynchronous access and synchronous accesses. The different modes are supported separately and the operation mode is be pre-selected through the controller configuration interface.