• Thermal camera device integration

    RTLery’s participation in the project included PLL instantiation, device integration, clock multiplexing and dividers, system interface design, constraints for synthesis and STA reviews
    • Client: Senso-optics
    • Time: 7 months
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  • PSRAM memory controller development

    RTLery developed to specification a controller for PSRAM (Pseudo SRAM) memory including a verification environment, timing constraints and documentation.
    • Client: Siano Mobile silicon
    • Time: 1 month
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  • bitcoin mining device synthesis and STA

    RTLery participated in the project performing architectural exploration for power and performance, synthesis of blocks and full-chip, STA and timing reviews as well as floor planning, clock distribution logic and PLL integration.
    • Client: Spondoolies Tech & Verisense
    • Time: 8 months
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  • SOC architecture and design

    RTLery’s assignment in this project was to develop a robust SOC architecture based on customer requirements, perform power performance and area estimations, assist in IP selection and document the architecture for the design team to implement.
    • Client: Veriest Ventures
    • Time: 5 months
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